A 3-bit ripple counter is a digital circuit that counts in binary from 000 to 111 and then resets back to 000.
It consists of three flip-flops connected in cascade, where the output of one flip-flop serves as the clock input of the next flip-flop.
Functioning:
- Initially, all flip-flop outputs are set to 0 (000).
- When the clock signal (CLK) transitions from low to high (rising edge), the first flip-flop increments its count. Since the output of the first flip-flop serves as the clock input for the second flip-flop, the second flip-flop increments its count when the clock signal transitions again. This ripple effect continues through all flip-flops.
- When the count reaches 111, the next clock pulse causes all flip-flops to reset to 000, completing the counting cycle.
Diagram:
_______ _______ _______
CLK ------> | |----> Q0 | |----> Q1 | |----> Q2
| Flip- | | Flip- | | Flip- |
| Flop |<---- /Q0 | Flop |<---- /Q1 | Flop |<---- /Q2
|_______| |_______| |_______|In the diagram:
- CLK is the clock input.
- Q0, Q1, and Q2 are the outputs of the first, second, and third flip-flops respectively.
- /Q0, /Q1, and /Q2 represent the complemented outputs of the flip-flops, which are connected to their respective inputs for the next stage.
As the clock signal pulses, each flip-flop changes its state based on the previous flip-flop’s state, effectively counting in binary from 000 to 111. When the count reaches 111, the next clock pulse resets all flip-flops to 000, restarting the counting cycle. This is how a 3-bit ripple counter operates.