A 3×8 decoder is a combinational logic circuit that converts a 3-bit input into 8 unique output lines.
Each output line corresponds to one of the 2^3 = 8 possible combinations of the 3 input bits. The active output line has a logic level of 1 while all other output lines remain at logic level 0.
Truth Table:
| A2 | A1 | A0 || Y7 | Y6 | Y5 | Y4 | Y3 | Y2 | Y1 | Y0 |
|----|----|----||----|----|----|----|----|----|----|----|
| 0 | 0 | 0 || 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 || 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
| 0 | 1 | 0 || 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
| 0 | 1 | 1 || 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 1 | 0 | 0 || 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 || 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
| 1 | 1 | 0 || 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 1 | 1 || 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |Logic Diagram:
The logic diagram of a 3×8 decoder consists of three input lines (( A2, A1, A0 )) and eight output lines (( Y7, Y6, Y5, Y4, Y3, Y2, Y1, Y0 )). Each output line is driven by a NAND gate.
For example, let’s consider the input ( A2 = 1, A1 = 0, A0 = 1 ). According to the truth table, the output should be ( Y6 = 1 ) and all other outputs should be 0.
Here’s how the logic diagram works:
- Input lines ( A2, A1, A0 ) go into each NAND gate.
- The inputs are inverted before being fed into the NAND gates.
- The output of each NAND gate corresponds to one of the output lines.
- For the input combination ( A2 = 1, A1 = 0, A0 = 1 ), only the NAND gate corresponding to ( Y6 ) will have all its inputs as 0 (since ( A2 = 1, A1 = 0, A0 = 1 )), thus its output will be 1.
- All other NAND gates will have at least one input as 1, resulting in a 0 output.
- So, ( Y6 = 1 ) and all other outputs are 0, as expected.